Logical information associated with a flash memory cell is related to its physical size. In a single level device, a cell is said to be erased (logic level “1”) when few electrons are stored in the floating gate. Vice versa, a cell is said to be programmed (logic level “0”) when ‘enough’ electrons are stored in the floating gate. Depending on how many electrons are trapped in the floating gate, the gate threshold of the cell changes (i.e., when more electrons are trapped, the threshold is higher). Endurance and retention are two parameters often used to describe the quality of a flash memory cell. Endurance refers to the capability of the cell to maintain stored information after erase/program/read cycling, while retention refers to the capability of a cell to keep stored information over time.
In single level flash memory, each cell after a modify operation has a threshold higher than a program voltage threshold, Vtp, or lower than an erase voltage threshold, Vte. By comparing the current sunk from a read cell and a reference driven in the same condition, the information of the selected cell is established. A light endurance problem exists if some programmed cells lose a little charge from the floating gate. However, if these cells assume a threshold slightly lower than Vtp but higher enough of Vt_read, flash functionality is still good. If a cell is in this condition and programming is required on it, the program verify is better with a reference with a threshold Vtp. In this case, the cell will be verified as a logical “1” (it has a threshold lower than the reference Vtp used), and so it will be programmed. After this operation, the cell will have a threshold higher of Vtp and this means that the cell has been recovered. This operation is not user visible. In fact, if, before programming, the user reads the cell, the cell is evaluated as programmed. However, by using Vtp as reference of the verify, the cell is recovered and the recovery has no drawbacks.
In a multilevel flash device, the situation is not the same, and the choice of reference for verify before programming is more complex and can cause wrong operations in the case of cells with a threshold not exactly inside target distributions.
The threshold situation for multilevel flash memory cells is represented by the graph 100 shown in FIG. 1. In this case, the number of electrons trapped in the floating gate of the cell is controlled in a way that permits four distributions associated with four logical values, “11”, “10”, “01”, and “00”. Three different Vtp levels, Vtp0, Vtp1, Vtp2, represent three different ideal minimum values of the three distributions, “10”, “01”, and “00”. For read access, three references are also used with an appropriate margin between each level.
For the physical situation of distribution in a multilevel flash memory, a program algorithm can “move” the threshold of a cell towards higher values. Thus, it is physically possible to move a cell from distribution “11” to “10” or from “10” to “01” or from “11” to “00”. It is not physically permitted to move from “01” to “10”, for example. A possible program algorithm can follow the physics of the memory. Thus, if a user gives a pattern “01” on a cell in “10” distribution, the operation is physically correct and the final destination of the selected cell will be “01”. On the other hand, if a cell is in “01” and the user gives as a desired pattern “10”, this is not a physically correct request and the algorithm will not move the threshold of the cell.
Thus, for a physical approach to programming of a cell, the final destination of the cell will coincide always with the pattern (data to program) desired if the transition is physically possible. Otherwise, the cell will not be programmed at all. This is true for single level cells, as well. Under this approach, since the final destination coincides with the pattern required if a modify occurs, the first verify step before programming has to establish the absolute pattern on the selected cell. The best way to establish this position is to use Vtp0, Vtp1, and Vtp2. In this way, if a cell is slightly out of distribution, it will be correctly recovered.
For physical approaches, software written for use with single level cells has to be changed if multilevel cells are substituted. As an example, if a user gives a pattern “01” in a single level flash device, this refers to two cells of memory with each cell being treated separately as single level cells. If these two cells are in “10” condition, to reach a pattern “01,” a pattern of “1” is required on a cell “0”, which is not physically possible. The transition of the cell is left at its original position of “0”. On the other cell, the pattern required is “0” on a “1” cell, which is possible. Thus, the final destination will be “0”. The overall result is that with a starting situation “10” and a required pattern “01”, the actual final destination is “00”. In contrast, for a multilevel cell in “10”, the required pattern “01” will be the final destination, as this is a possible transition. A graph 200 of FIG. 2 illustrates an initial cell position of “10” and a final cell position of the required pattern “01”.
Another approach to programming permits the management of single level and multilevel flash by the same software. This approach is referred to as a “logical” approach. Under this approach, even if flash has a multilevel structure, the user can use it as a single level one. If a pattern is given to program a bit at “1”, the corresponding bit does not need to be modified. If a pattern is given to program a bit to “0”, the corresponding bit has to be “0” after programming. Thus, if a cell is in distribution “10” and the pattern to program is “01”, the requested final distribution of the cell is “00”. If the cell is in distribution “01” and the pattern to program is “10”, the final position of the cell has to be “00”. Graph 210 of FIG. 2 illustrates the initial to final position by the solid arrow, where the dashed arrow indicates the unallowed transition from “10” to “01”.
Many different methods to program cells are known in the prior art that try to move cell thresholds with a high precision and with a relatively fast execution time. As mentioned previously, physical approaches require dedicated software for each of single level and multilevel devices. Logical approaches use the same programming for single and multilevel devices. However, these prior art logical approaches assume that cells are in their ideal distributions (i.e., there is no retention problem). When there is a light charge losing and some cells are lightly out of their distributions, the device can work correctly but programming on these cells can fail.
Accordingly, a need exists for a programming approach that ensures a desired final destination for a cell is reached even when a cell may not be in an ideal distribution. The present invention addresses such a need.